QVIP Development Engineer

Job description

  Noida, India
·  Engineering
·  115493
Digital Industries

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Job Description

Verification Engineer:

Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe5, USB3.2, 400 Gigabit Ethernet and leading AMBA coherency protocols like ACE5, CHI for use with Questa RTL simulation.

·Questa verification IP's help design teams find more bugs in less time than conventional simulation techniques.

·You will specify, implement, test and enhance these verification components for a wide range of end user applications.

·You will interact with TMEs and CSDs or directly with customers to deploy or resolve customer issues

Job Qualifications:

·B.Tech/ M.Tech in electrical engineering or related field from reputed institute

·Sound Verilog HDL RTL knowledge and working knowhow of RTL simulations

·Sound knowhow of System Verilog for testbench with exposure to verification methodologies like UVM, VMM etc.

·Intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc.

·0-2 years of experience in verification engineering

Job ID: 115493

Organization: Digital Industries

Company: Mentor Graphics (India) Private Limited

Experience Level: Early Professional

Job Type: Full-time

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