Technology Development ESD Latchup Engineer

Job description

Job Description

Microelectronic Quality Reliability Engineers provide project management, product, process design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components, sub systems and/or completed units. Responsible for physical understanding, model prediction and enhancement of quality and reliability for advanced products, transistor, interconnect, assembly/package and testing process. Defines Si/assembly/package qualification requirement and responsible for product qualification or technology certification. Defines/develops and conducts stress tests, DFX requirements and research on individual technology components as well as integrated circuit/products. Develop cost effective production monitoring and screening schemes to ensure process is stable and products meet committed quality and reliability performance.

The ESD/LU engineer's responsibilities may also include:

-Guiding manufacturing process development to ensure the technology will meet ESD and LU requirements.

-Creating reliability ESD and LU design layout rules and specifications for use by internal and external design teams.

-Looking ahead to new risks associated with ESD and LU in upcoming technologies.

-Generating test structures and conducting electrical measurements to validate ESD and LU design rules.

-Performing risk assessments and making quality and reliability predictions based on data collected using statistical principles and design of experiments fundamentals

-Advising design teams on selection, application and test of electronic components and systems based on ESD/LU DR and technology risks.

-Collaboration with cross functional teams to solve technical / reliability issues during technology development and ramp to high-volume manufacturing.

-Recommending process technology certification evaluation and acceptance criteria.

-Partners may include Logic Technology Development LTD, wafer Fab Manufacturing and Test FSM, Assembly & Test Technology Development ATTD, Assembly and Test Manufacturing ATM, Intel Custom Foundry, internal and external design teams, and partners within Intel's Customer Quality Network CQN focused on Product, Development, and Manufacturing Reliability.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Desired profile

Qualifications

You must possess the minimum qualifications to be considered for this position. Preferred qualifications are in addition to the minimum qualifications and are considered a plus factor in identifying top candidates. Experience can be obtained through a combination of prior education, current Ph.D. course work, projects, research and any relevant prior job/internships.

Minimum Qualifications:

This is a position intended for an experienced engineer with a Ph.D. degree + 2 yrs. exp. in Electrical Engineering, Material Science, Physics or related discipline. Consideration will be given to a candidates with less industrial experience if exceptional expertise and experience in the areas of ESD and/or Latch-up is demonstrated during their Ph.D. program. Expertise in ESD and latch-up physics and design methodologies is essential, as well as excellent communication skills.

Preferred Qualifications:

-Experience in ESD and Latchup design methodologies, design rule formulation, and technology development

-Experience in experimental design, execution, and interpretation.

-Experience with semiconductor device fabrication, integration, and characterization.

-Experience with electrical measurement equipment in characterizing semiconductor devices e.g. TLP systems, HP4156C or similar SPA, oscilloscope, function generators etc.

-Experience in VLSI circuit design, including analog and digital.

-Understanding of reliability failure statistics, physics, or failure mechanisms.

-Experience programming with formal language C,C++, C, etc. and scripting language AWK, PERL, Python, SQL, TCL, VBScript, etc.

-Experience with statistical analysis packages e.g. SAS, JMP, Minitab, R, etc.

-Prior Intel Intern or Scholarship recipient