SoC Logic Design and Verification Engineer

Job description

Job Description

Job Description: Oversees definition, design, verification, and documentation for SoC (System on a Chip) development. Determines architecture design, logic design, and system simulation. Defines module interfaces/formats for simulation. Performs Logic design for integration of cell libraries, functional units and sub-systems into SoC full chip designs, Register Transfer Level coding, and simulation for SoCs. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Performs all aspects of the SoC design flow from high-level design to synthesis, place and route, timing and power to create a design database that is ready for manufacturing. Analyzes equipment to establish operation infrastructure, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

Inside this Business Group

Non-Volatile Solutions Memory Group: The Non-Volatile Memory Solutions Group is a worldwide organization that delivers NAND flash memory products for use in Solid State Drives (SSDs), portable memory storage devices, digital camera memory cards, and other devices. The group is responsible for NVM technology design and development, complete Solid State Drive (SSD) system hardware and firmware development, as well as wafer and SSD manufacturing.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

Desired profile

Minimum Qualifications:
B.S. or M.S. Degree in Electrical Engineering, Computer Engineering, or equivalent Additional Preferred Qualifications:
- Knowledge of computer architecture
- Digital design (including RTL, preferably with Verilog)
- Circuit design (understanding of clocking, basic circuits, timing issues)
- Object oriented programming skills with C/C++ and/or SystemVerilog
- Knowledge of SystemVerilog Testbench Assertions
- UVM/OVM experience
- Self-motivation, strong problem solving and verbal/written communication skills, and be a team player
- Applicants must have a legal right to work in the US without sponsorship for Bachelors candidates