IC Package Design Engineer Layout - Intel - Bengaluru

Job description

Job Description

We're looking for an experienced IC Package Design Engineer DE to join as a member the Datacenter Package Engineering team which resides under the DCG Platform Hardware Engineering Division PHED.As a Package design engineer you will be responsible for early form factor component fit studies, die escape strategies, power delivery development and implementation, ball map creation, signal assignment, die interface co-design, and point to point routing of high speed interfaces. Your work will include designing & validating your package design using a variety of custom Intel tools. You will need to comprehend and drive schedules and design rules in a team environment. Product requirements are delivered and owned by a Responsible Engineer RE who will be your partner in defining, executing, and validating the package design. 90% of our designs require a team approach utilizing as many as 5 designers. Communication is critical to success.In addition, you will be expected to present key learnings in the group setting either face to face or via teleconference, develop Best Know Method BKM documentation and collaborate at the team level.Experienced package designers are preferred, not required. Mentor Graphics Xpedition experience is also preferred, but not required given a solid history of quick ramp on various design software - ie, Solid Works, AutoCAD, Cadence Advanced Package Designer APD, etc..

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

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Desired profile

Qualifications

Qualifications Minimum qualifications: You must possess a Bachelor's w/3+ years industry experience or Master's degree w/2+ years industry experience in Electrical Engineering, Computer Engineering, or equivalent, plus the following: - 2 or more years of experience developing printed circuit boards including multi-layer layout, specifically board routing - 2 or more years of experience with Cadence Allegro/Concept toolsets Additional Preferred Qualifications: 2 or more years of experience with: - Analog signal integrity simulations, timing analysis capability. - Generating manufacturing output files: BOMs etc. - Interfacing with PCB manufacturers and contract board assemblers - Optimizing PCB layout, PCB cost and PCB process manufacturing improvements - Preparing files for prototyping and production - Providing leadership to project or team when required - Debugging and problem solving - Experience with multilayer PCB designs. - Experience with FPGA design/coding. - Hardware and software interfacing - familiarity with LCT tools. - Lab validation experience including Oscilloscopes, DMM, etc. - Working knowledge of PC / server architecture - Writing and executing tests to ensure that the block design is verified to meet specifications - Strong verbal and written communication skills for interacting with design, evaluation and manufacturing engineers, customers, technical marketing engineers, material planners, and program managers - Ability to work independently