Graphics Hardware Engineer

Job description

Job Description

If you're interested in computer graphics and working with leading graphics hardware engineers on Intel's latest GPU/CPU architecture, then our Visual and Parallel Computing Group (VPG) has opportunities for you. VPG delivers Intel's 3D graphics, media, display, GPU, and Parallel Computing Technology.

This position is in Graphics hardware front-end development where you will be working closely within a team of graphics hardware design/validation engineers, micro-architects, and architects on Graphics IP targeting a wide range of Intel's future generation discrete and integrated graphics products. The development environment is dynamic and fast-moving, focused on high-quality results, frequently entailing multiple projects under concurrent development. You will be encouraged to take informed risks, to continuously seek useful design innovations and process improvements, and to have fun while doing so.

Responsibilities include but are not limited to:

• Analysis, interpretation, and assessment of hardware architectural specifications defining feature requirements for Graphics HW IP.
• Contributing towards development of logic designs and HDL code for Graphics HW IP. Design implementations must meet functional and performance requirements, physical/structural design constraints (timing, area, power), as well as proprietary design rules and other quality criteria.
• Definition and development of test plans, verification environments, validation components (bus functional models, trackers, checkers, scoreboards, test benches, etc.), functional coverage points, assertions, random and directed tests, random test constraints, etc. to validate Graphics HW IP at various levels of integration.
• Integration and maintenance of HDL models and verification environments for simulation and ASIC logic synthesis.
• Execution and debug of hardware simulations; achievement of functional test coverage objectives. Identification and closure of design and environment defects, including bug fixes requiring manual ECOs (gate-level netlist edits).
• Characterization and analysis of performance and power results; implementation of corresponding design modifications and optimizations as required to achieve power and performance targets.
• Execution of ASIC logic synthesis flows; implementation of corresponding design modifications and optimizations as needed to achieve timing and area objectives.
• Debug of graphics hardware in emulation and/or silicon hardware environments; working with synthetic low-level tests as well as with stimulus from real-world applications and benchmarks and the graphics driver.
• Strong communication, interpersonal, and problem-solving skills
• Strong technical and business writing skills
• Motivation, self-direction, and ability to work effectively both independently and as part of a diverse cross-geographic team
• Ability and willingness to efficiently manage multiple concurrent assignments, to deal with dynamic objectives and plans, and to deliver high-quality output against deadlines

Inside this Business Group

The Core and Visual Computing Group (CVCG) is responsible for the architecture, design and development of the CPU core and visual technology IPs that are central to Intel's system-on-a-chip (SoC) products and key to our datacenter, client and Internet-of-Things (IOT) platforms. CVCG strives to lead the industry through continuous innovation and world class engineering.

Desired profile

Qualifications

You must possess these minimum qualifications to be initially considered for this position. Experience can be obtained through academic research projects and/or relevant industry job/internship experience.

The ideal candidate must possess a Bachelor's or Master's Degree in Electrical and/or Computer Engineering or related fields.

At least 1+ years of experience in:

• Computer architecture/organization fundamentals
• Logic design implementation and verification using (coding in) hardware description (RTL) and verification languages such as Verilog or System Verilog; applying good coding style
• Definition and development/implementation of test plans, verification (simulation) environments, validation components, and tests
• Usage/execution of logic simulation, synthesis, and timing analysis tools and environments; familiarity with broader ASIC development flows; hardware/hardware model debug
• Unix and Windows OS usage
• Programming or scripting languages such as C/C++, Perl, Ruby, and Python

PREFERRED QUALIFICATIONS

Preferred qualifications/skills include training and experience in:

• Graphics architecture concepts, APIs, and standards - e.g., Direct3D, OpenGL; media/video codec standards; implementation of vector-based DSP/SIMD algorithms; Intel CPU architecture
• Coverage-based validation concepts and application - functional coverage points, assertions, random and directed tests, random test constraints, etc. using System Verilog or similar verification languages/tools; UVM/OVM verification methods
• Synopsys ASIC design tools - VCS simulator, Design Compiler, IC Compiler
• Formal verification methods - formal property verification (e.g., Jasper), high-level/algorithmic formal equivalence checking (e.g., HECTOR)
• Familiarity with digital hardware emulation and hardware debug tools - emulators, logic analyzers, etc.