Signal Integrity & Power Delivery Engineer

Job description

Job Description
The engineer is expected to take up significant technical role and becomes a domain expert in one or more technical fields. The engineer is supposed to use HSPICE and frequency domain simulators and work on high speed SERDES TX and RX modelling, design collateral generation which involves cross group interaction, deep dive technical analysis, industry spec deployment and development , and create big impact. For example, develop a robust methodology for SI/PD co-simulation for TX and RX designs, do SI/PD sil2sim correlations, defining bus design UPM/BER goals as PRQ criteria, develop a new buffer modeling , establish a BKM for pre-post Si correlation, platform level cost/power optimization and tradeoff analysis, etc. In addition, the engineer is expected to spend significant amount of effort enabling by contributing to team"s methodology improvement. The engineer is expected to have in-depth knowledge and strong practical experience in transmission line and power delivery decoupling design, and medium knowledge in IO circuit design and package/platform design, as well as circuit architecture and post silicon validation. The engineer is expected to have strong skills in self-directed learning and can pick up new adjacent technical areas quickly if needed.

Desired profile

Qualifications
- Bachelor or MS or PhD degree in Electrical Engineering
- 4+years of work experience in signal integrity/power delivery design, simulation method, model generation, is required
- 4+ years of experience of signal integrity/power delivery simulation tools, such as Hspice, HFSS, Sigrity, Agilent ADS, etc., is required
- 4+ more years of experience in signal integrity/power delivery design or providing design guidance is preferred

Additional qualifications include:
- Experience of understanding the simulation methodologies and using advanced simulation tools for complex modeling and jitter analysis is preferred
- Knowledge of high speed/ legacy interfaces such as DDR3/4, PCI-E Gen2/3, SATA2/3, USB2/3, Display, Gb Ethernet, SDIO, etc., is preferred
- Experience of measurement techniques, such as using oscilloscope, TDR and VNA, is preferred
- Strong organizational and communication skills is preferred
- Disciplined and result oriented, ability to heavily multitask is preferred