RFIC design intern

Job description

Integration of wireless transceivers in scaled CMOS processes enables miniature devices with powerful communication and digital processing capabilities. These can extend the capabilities of current mobile devices, and even enable new end-user applications altogether. However, RF integration is challenging because of the large complexity of modern wireless standards and the fact that CMOS processes are optimized for optimum digital performance, rather than RF. Our team is developing innovative RFIC architectures and circuits that leverage the strengths of scaled CMOS processes to enable new capabilities, more integration, and lower power for Intel"s future wireless transceivers. The intern will have the opportunity to work as part of Intel"s world-class global wireless team to develop such innovative concepts and eventually do tape-out on an advanced CMOS node to demonstrate their functionality and value.

Desired profile

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:


- Must be pursuing a MS or PhD in Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field

- Minimum of 6 months experience with background in RF integrated circuit design and systems.

- Minimum of 6 months experience with Matlab, Cadence, tapeout and characterization of RF integrated circuits.