Post-Silicon Power Management Validation Engineer

Job description

Job Description
Job Opportunity/Description: The Post-Si Power Management Validation engineer is responsible for the design emulation bring up, creating and executing the power management validation test plan, and platform validation. The other duties includes driving silicon debug by working with logic and circuit design engineers, and providing feedback to the circuit team on the circuit optimization.

Inside this Business Group

The Data Center Group (DCG) is at the heart of Intel's transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

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Desired profile

Qualifications

Key Skills :Master of Science or a Master of Technology degree in Electronics and or Electrical Engineering or a Bachelor of Science Bachelor of Technology degree in electronics and or Electrical Engineering.Proficiency in Python is a must. Proficiency in C/C++ will be a plus.Person should be a team player and should be able to work with other functional teams such as circuit/Analog design effectively.Knowledge/experience on power management and related technologies as it pertains to Data Center and Servers is a plus.