Analog Design Engineer

Job description

Job Description

Intel's ITG-MIG organization empowers Intel SOCs with leading mixed-signal IP. The Toronto analog design team within MIG is looking for talented individuals who wish to be a part of building the Industry's next generation products with focus on high-speed serial links.

Responsibilities include the following:

·  Work with a team of analog and digital designers on the design, simulation, layout, and testing of both analog and mixed-signal circuits
·  Drive innovation and initiatives to enhance existing automation, tools, and methodology
·  Support teams of engineers with issues in quality and reliability of mixed-signal circuit
·  Create necessary design and product documentation
·  Express/communicate technical ideas and initiatives in a solid written and verbal manner
·  Independently work with limited supervision

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel's next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Desired profile

Qualifications

Minimum Qualifications:

·  M.A.Sc or Ph.D. in Electrical Engineering with 3+ years of relevant work experience
·  Deep and demonstrated understanding of analog and mixed signal circuit design, including methodology, layout, analog designer tools, processes, and simulations
·  Familiarity with industry standard design conventions and rules in analog circuit design awareness of techniques to reduce design risk
·  Experience debugging, probing, and characterizing silicon using standard lab equipment
·  Solid written and verbal communication for expressing technical ideas and initiatives
·  Able to work independently with limited supervision
·  In depth understanding of silicon manufacturing technology
·  Experience with tools for schematic entry, IC layout and SPICE simulation

Preferred Qualifications:

·  Knowledge of Verilog-A for analog behavioral modeling is desirable
·  Experience with TCL, Perl, C, python, or other scripting languages is desired