Lead Electronic Designer

Job description

Job Description Summary

Role Summary

The lead engineer completes board level digital circuit design, integration, verification and documentation of leading-edge aerospace processor and/or FPGA assemblies. In this role you will work within defined parameters to make decisions, apply concepts to issues of moderate complexity, and resolve issues through immediate action or short-term planning.

Job Description

Roles and Responsibilities

·  Design processor and/or FPGA assembles including design, schematic capture, component placement, layout constrains, PWB stackup, layout review/approval.
·  Conduct board brining up, integration, and verification activities.
·  Troubleshoot complex processor and/or FPGA failures.
·  Participate in Design for Manufacturing (DMF), Maintainability, and Testability concepts.
·  Participation in design architectural trade studies and proposals.
·  Interfacing with customers with minimal oversight from senior personnel.
·  Mentoring of junior engineer.
·  Leading and coordinating multi-disciplinary design teams.

Required Qualifications

·  Minimum of Bachelor’s degree in Electrical Engineering with 3+ years of professional experience in digital design.
·  Knowledge of board level digital design process from schematic capture, implementation, integration, and verification.
·  Ability to break down complex problems and apply critical thinking.
·  Strong professional technical writing and technical communication proficiency.

Desired Characteristics

·  Master’s degree in Electrical Engineering with 7+ years of professional experience in digital design.
·  Experience in High Density Interconnect (HDI) technologies (micro vias, buried / blind vias, back drilling) for IPC Class 3 board. 
·  Experience in design of 5+ Gbps serial links. (10GBASE-KR, PCIe Gen3, Fiber Optics)
·  Knowledge in board simulations including Power Integrity (PI) and Signal Integrity (SI).
·  Experience designing with Gigahertz microprocessors, FPGA, CPLD, DDR3 or DDR4 memory, flash memory, Gigabit Ethernet, and PCIe.
·  Experience with large pin count devices, 1000+ pins with 0.8mm device pitch or smaller
·  Familiarity with the Mentor Graphics Expedition Enterprise and Hyperlinx PI/SI.
·  Experience designing with CAN, MIL-STD-1553, ARINC 429, ARINC 664.
·  Experience with OpenVPX and PIC-SIG standards.
·  Experience in the Mil/Aero/avionics
·  Familiarity with OrCAD PSPICE or LT Spice, Mathcad, Microsoft Office, Microsoft Visio.
·  Strong professional technical writing and technical communication proficiency.

Additional Information

Relocation Assistance Provided: No