Conception / Génie civil / Génie industriel1. Expertise in Non-Volatile memory architecture like Positive/Negative Charge Pumps, High Voltage switches, Oscillators, Current/Voltage references & Regulators in Testchips used for Technology qualification and standalone Flash and EEPROM IPs or MEMs applications.
2. Critical Path design & simulation, dc path, SOA, and IR drop simulation + Top-level verification of IPs using Fast spice simulators like HSIM, nanosim and Digital Simulations using NCSIM.
3. Possess good analytical and problem solving skills.
4. Worked as IP owner and heading a team of 2 members for non volatile memory top level verification.
5. Responsible for the quality of Non volatile memory and IO’s delivered to customer and also responsible for the queries from customer.
6. Experience in characterization of various IP’s and Analog Cells.
7. Experienced in HDL modeling of IO cells(Bi-directional, LVDS, ANALOG, I2C, Compensation).