System-On-Chip Emulation CAD Development Sr Staff Engg
Grenoble (Isère) Développement informatique
Description de l'offre
Job Description
Job Title:
System-On-Chip Emulation: CAD Development Sr Staff Engg
Job ID:
195613
Location:
Grenoble
Country:
France
Job open date:
06/07/2019
Job Function
CAD Development
Job Category:
CAD Developement
1
No. of offers for job:
Organization
Microcontrollers and Digital ICs Group
Posting Description
Our ST-central team develops SOC emulation platforms enabling 1000x faster execution of embedded software than RTL simulation, together with full visibility and controllability of software and hardware simultaneously.
These HW-Emulation platforms execute on EDA machines and are used by Boot ROM code developers, RTL verification engineers, pre-silicon SW developers, pre-bringup system (HW+SW) validation engineers, for the success of key ST SOC development programs across divisions.
Such programs include high-end ST microcontrollers, digital SOC for satellites, vision processing, and other new multi-processor real-time microcontrollers.
Our team mission is to provide state-of the art emulation platforms and tools. We evaluate and propose new solutions (models, tools, flows) to divisions users; we map the divisions RTL on the EDA emulator systems in our ST central Emulation Lab, integrate emulation solutions (I/O boards or simulation) for external interfaces (JTAG, UART, USB, Mipi display DSI / camera CSI, etc), run C sanity tests, deliver access to the platform remotely to users WW for pre-silicon use.
Need is growing as SOC & SW complexity grows. User divisions sites include in particular Grenoble, Sophia, Le Mans, GreaterNoida.
The engineer will contribute to Emulation platforms setup for new SOC, then take leadership of SOC emulation project. The position is preferably located in Grenoble.
The position is an opportunity for the engineer, either from RTL or SW or verif/valid background, to complement his/her knowledge in the other domains, for growing in system platforms competencies which is a major trend in industrial and other key ST markets.
Profile
Education Level Required - BAC+5 (INGENIEUR,DESS,DEA...), Years of Work Experience - 5 to 25,.The Other skills required are Several competencies/backgrounds among:
- C (embedded, tests)
- VHDL, Verilog
- SoC or IP functional verification
- SoC Validation
- Design / test SW debug and analysis
- SoC architecture understanding
Job Restriction