Expires soon Intel

SPTD Packaging R&D Engineer

  • Graduate job
  • Phoenix (Maricopa County)
  • Marketing

Job description

Microelectronic Packaging Engineers provide project management, package design/development and sustaining support for integrated circuit or semiconductor assemblies, various other electronic components and/or completed units. Responsible for the thermal/mechanical/electrical design, analysis, and development of electronic packages. Defines overall package performance and specification and realizes technology certification through layout design and test vehicle design. Conducts tests and research on basic materials and properties. Establishes material specifications for contract assemblers and raw material vendors and interfaces with Quality Assurance and Purchasing regarding material quality and vendor performance. Provides consultation concerning packaging problems and improvements in the packaging process. Responds to customer/client requests or events as they occur. Develops solutions to problems utilizing formal education and judgment.

Desired profile

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.

Minimum Qualifications:
The candidate must possess a Ph.D. in Materials Science and Engineering, Chemical Engineering, Chemistry or Polymer Science and Engineering

Candidate must have work or educational experience in the following:
ยท  substrate packaging, assembly processes, electroplating, electrochemistry, thin film deposition, metallization or plasma technology

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