Signal Integrity-Power Integrity Engineer

Job description

Job Description

• Engineer need to know high speed signal Integrity theory as reflections, impedance matching, return loss, insertion loss, cross talk and Power Integrity issues.

  Experience in Inductor design in deep sub-micron process is an advantage.

  Engineer will simulate signal integrity of Silicon, PKG and Board design using high end tools as Ansoft HFSS.

  We are looking for experienced Signal Integrity/Power Integrity Engineer for our SIPD team in Jerusalem that will be responsible for signal/power integrity of IP covering silicon, package and board.

  ACES department (Architecture,Circuits,Ethernet andSerDes IP's) develops and delivers PLL's and all High Speed networking and communication building blocks to all Intel devices (Client and Servers CPU's / Chipset / Controllers).

  The Jerusalem team has 160 engineers in all design and validation fields from architects and system definition, through design engineers until post sil tests and debug engineers. Most of the team are HW / chip design engineers with few FW and CAD engineers.

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IMPORTANT:Please be informed that Intel is proactively trying to find candidates for a Signal Integrity-Power Integrity Engineer position and that this position may not be available at this time.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel's next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Desired profile

Qualifications

• • Good knowledge of 3D/2D EM simulation tools, electromagnetic and transmission line theory.
  • Experience in Si/PI methodology development, Full system signal integrity analysis, PDN modeling from die through package to pcb.
  • 3+ year's hands on experience in design and analysis of product's signal integrity and power integrity.
  • BSc/MSc in Electrical Engineering.
  • Analog RF experience is an advantage
  • Experience in Signal Integrity tools and theory (S-parameters, distribution systems, reflections)
  • Knowledge on 3D/2D methodology development, full system signal integrity analysis and/or power delivery modeling building from die model through Package and board
  • Experience in Post sil debug and testing and lab equipment (VNA, Real Time scope, Spectrum analyzer)
  • Experience in Board design layout