Stage Master 2: RF characterization of 28nm-FDSOI MOSFETs for cryogenic operation H/F (Technologies micro et nano)

Job description

Domaine : Technologies micro et nano

Contrat : Stage

Description du poste :

Internship framework. Fully-depleted Silicon-On-Insulator (FDSOI) technology is one of the main challenger for the technology downscaling thanks to its high performances such as high-speed, low power, as well as high RF figures of merit [1]. Besides, FDSOI is a valuable solution for circuits working at cryogenic temperatures such as readout and control electronics for quantum computing or deep-space applications [2,3]. For efficient and reliable circuit designs it is essential to embed digital, analog and RF models in a process design kit in order to predict the MOSFETs performances and power dissipation at cryogenic temperatures. The internship goal will be to work on the setup for RF measurements down to 4.2K, and the corresponding RF characterization and modelling of 28nm-FDSOI technology for cryogenic operation.

Work description.The internship will be divided in three parts:
The first part will be the installation and automation of a cryogenic setup specially dedicated for RF characterization down to 4.2K. The intern will deal with mechanical challenges for probing at high-frequency as well as the de-embedding at cryogenic temperatures.
Next, during the second part of the internship, the candidate will be responsible of electrical and RF characterization of MOS transistors as well as passive components (transmission lines, inductances, etc.) integrated on 28nm-FDSOI technology, facing equivalent model extraction at different cryogenic temperatures.
Finally, modelling and understanding of the device will be improved with TCAD tools.
A PhD is also proposed on the topic for a beginning in October 2021.
References
[1] "NanoElectronics Roadmap for Europe", https://www.nereid-h2020.eu/roadmap
[2] L. Nyssens et al., “28-nm FD-SOI CMOS RF Figures of Merit down to 4.2 K,” IEEE J. Electron Devices Soc., vol. 8, no. June, pp. 646–654, 2020, doi: 10.1109/JEDS.2020.3002201.
[3] E. Charbon, “Cryo-CMOS Electronics for Quantum Computing Applications,” in Proceedings of 49th European Solid-State Device Research Conference (ESSDERC), 2019, pp. 1–6, doi: 10.1109/ESSDERC.2019.8901812.

Candidate's profile. Student from Master in Engineering science/Microelectronics, with skills in Radio-Frequency electronics, and/or Semiconductor physics. Experimental research performed at undergraduate level will be beneficial.




Ville : Grenoble

Langue / Niveau :

Anglais : Intermédiaire