ASIC / FPGA Engineer

Job description

ASIC / FPGA Engineer

Airbus Defence & Space Stevenage (ex Astrium Terminals & Products)

Airbus is a global leader in aeronautics, space and related services. In 2016, it generated revenues of € 67 billion and employed a workforce of around 134,000. Airbus offers the most comprehensive range of passenger airliners from 100 to more than 600 seats. Airbus is also a European leader providing tanker, combat, transport and mission aircraft, as well as Europe's number one space enterprise and the world's second largest space business. In helicopters, Airbus provides the most efficient civil and military rotorcraft solutions worldwide.

Our people work with passion and determination to make the world a more connected, safer and smarter place. Taking pride in our work, we draw on each other's expertise and experience to achieve excellence. Our diversity and teamwork culture propel us to accomplish the extraordinary - on the ground, in the sky and in space.

Description of the job

A vacancy has arisen within Airbus Defence and Space for a Digital design Engineer within the Communication Processors Group based in Stevenage.
The Communication Processors group is responsible for the development of Digital Processors for use in telecommunication Satellites. The processor functionality ranges from high capacity channelisers, supporting inter-satellite optical data links, to implementing cryptographic algorithms to protect the spacecraft.
In this rewarding role you will be developing some of the highest performing digital communication payload equipment available anywhere in the world, and be part of the rapidly expanding UK space sector.
The availability of advanced Payload Equipment is the driving force behind the digital telecommunication satellite industry, and the team is a proven world leader in this field.
We are committed to offering continuous training and career development. We understand that our success is based on our people and we strive to offer all our employees an enjoyable and rewarding career.

Desired profile

Tasks & accountabilities

Your main tasks and responsibilities will include:

·  Decomposition of requirements into an architecture design and document the chosen design whilst describing any trade-offs performed.
·  Detailed RTL design in VHDL.
·  Verification of the RTL design and documenting the verification that was performed.
·  Gate level implementation of the design including synthesis, placement and static timing analysis.
·  Support integration of the ASIC / FPGA into the target hardware.
·  Ensure that all ASIC / FPGA designs are developed in accordance with the company design process.
·  Support customer design reviews.

Required skills

·  Experienced in the complete design flow from requirements to design acceptance.
·  Experienced in FPGA technologies and their tools including Xilinx ISE and Microsemi Libero.
·  Experienced in VHDL simulation tools in particular Mentor Graphics Questa.
·  Experienced in synthesis and STA tools ideally those from Synopsys.
·  Good analytical skills and methodical approach to problem resolution and investigations.
·  Good communication skills and able to thrive in a team environment.
·  Ability to present technical data in a clear and concise manner.
·  Experience of the Linux operating system would be beneficial.
·  Knowledge of scripting languages including TCL and PERL would be beneficial.
·  Educated to degree level in Electronic Engineering or related discipline